`timescale 1ns / 1ps

module add_32b32(clk, reset, a, b, o, carry);
	input clk;
	input reset;
	input [31:0] a;
	input [31:0] b;

	output [31:0] o;
	output carry;

	reg [32:0] sum;


	always @(posedge clk) begin
		if (reset == 1'b1) begin
			sum = 0;
		end
		else begin
			sum = a + b;
		end
	end

	assign #1 carry = sum[32];
	assign #1 o = sum[31:0];


endmodule

module test_add_32b32_v;

	// Inputs
	reg [31:0] word_from_file;
	reg [31:0] constant_inc;

	// Outputs
	wire [31:0] sum_output;
	wire carry_output;

	reg [31:0] read_header[2];         
	reg lclk;
	reg lreset;
	reg     [31 : 0] membuf [ 0 : 4095 ]; 
	integer in_mcd, out_fdisplay_mcd, out_fwrite_mcd;
	integer start_addr, stop_addr, temp;
	reg [31:0] iter;

	
	parameter GLOBAL_CLK_PERIOD = (15.15)	;	 		//66MHz
	 
	 
	always begin
		#(GLOBAL_CLK_PERIOD * 0.5) lclk = 1'b0;
		#(GLOBAL_CLK_PERIOD * 0.5) lclk = 1'b1;
	end


	// Instantiate the Unit Under Test (UUT)
	add_32b32 uut (
		.clk(lclk),
		.reset(lreset),
		.a(word_from_file), 
		.b(constant_inc), 
		.o(sum_output), 
		.carry(carry_output)
	);


 	initial begin
		//example filling of a memory buffer from a text file with readmemh
		//the format for the input.mem must be:
		//1 byte per line, in ascii, filling the memory buffer from high byte to low byte.  ie
		//00
		//01
		//02
		//03
		//becomes mem[0] = 0x00010203
		$readmemh("./input32.mem", membuf);
		end
   

	initial begin
		// Initialize Inputs
		word_from_file = 0;
		constant_inc = 0;
      in_mcd = $fopen("./input_base0.bin", "rb");
		out_fdisplay_mcd = $fopen("./output_fdisplay.txt","wb");
		out_fwrite_mcd = $fopen("./output_fwrite.txt","wb");
	
		start_addr = 0;
		stop_addr = 1;
		temp = 0;
		iter = 0;

	 	lreset = 1;
		// Wait 100 clocks for global reset to finish
		#(GLOBAL_CLK_PERIOD * 100);
		
	
		
		@(posedge lclk);
		#1 lreset = 0;
		//read the first input word out.  No write occurs with this read, as it is the first
		//read
		temp = $fread(read_header, in_mcd, start_addr, stop_addr);
		#1 word_from_file <= read_header[0];
			
		//example fread (in binary), fwrite (in ascii) and fdisplay (in ascii). 
		//note that the $fwrite and the $fdisplay file results are equivalant
		
		//read 1K out of the input file
		while (iter < 1024) begin      
			@(posedge lclk)
			temp = $fread(read_header, in_mcd, start_addr, stop_addr);
			#1 word_from_file <= read_header[0];
			//wait for output of uut to settle
			$fwrite(out_fwrite_mcd, "%x\n",sum_output);
			//example writing the read in value + 1 to the output file
			$fdisplay(out_fdisplay_mcd, "%x", sum_output);
			//example writing the inputs and outputs to the screen
			$display("Input %x\t at time %t", word_from_file, $time);
			$display("Output %x\t at time %t", sum_output, $time);
			#1 iter = iter + 1;
		end				  
		@(posedge lclk)
		//wait for output of uut to settle
		$fwrite(out_fwrite_mcd, sum_output);
		//example writing the read in value + 1 to the output file
		$fdisplay(out_fdisplay_mcd, "%x", sum_output);
		//example writing the inputs and outputs to the screen
		$display("Input %x\t at time %t", word_from_file, $time);
		$display("Output %x\t at time %t", sum_output, $time);
		word_from_file = 0;
		$fclose(in_mcd);
		$fclose(out_fdisplay_mcd);
		$fclose(out_fwrite_mcd);


	end
      
endmodule