Finite State Machine (FSM) Project Assignment

Just as for the 120-Project-LC4, this is a team project to be done in pairs. The last day I will accept work is the last day of finals. However, be warned that you must schedule a team interview with me to review the project. Interviews are scheduled on a first-come/first-served basis. Do not wait too long to request an interview time slot, there might not be any slots left by then.

You have done part of this project's work already in your lab breadboard assignments. Your task is to build a FSM on your breadboard using TTL chips. The FSM can be any that you choose. The requirements are that it have at least 1-bit input, 1-bit state, and 1-bit output.

Input

Your machine's input will be connected to data switches on your breadboard. If you have 1-bit input, you will only need to use one data switch. Your input data becomes valid when you set the data switch for a new value after the last state-transition of your FSM.

Output

Your machine's output will be connected to LED's on your IDL-800 Digital Lab. Recall that the LEDs only light when supplied with a logic 1. Therefore, to have a 1-bit output, you will need to send the 1-bit to two LEDs: one to light when your output is 1, and one through an inverter to light when your output is 0.

State

Your FSM must have at least two states. A 1-bit state element can encode two states. You must build a FlipFlop (FF) for your state element. Build one latch (with enable) from basic gates (NAND, NOR, NOT). (Note that you should have already done this in one of our first assignments.)

For your second latch in your FlipFlip, you can either build a second latch using basic gates, or you can use a TTL 7475 D-latch chip. Ask me when you need one. The pinouts for the 7475 are in our Lec-1d-labIntro notes. Implement 2-phase clocking for your FF. The two enables for your two latches should be connected to data switches. Note that an RS-latch with enable requires 4 NAND gates. If you do not make it a D-latch, you can complete the FF using a total of 8 NAND gates.

Next-State and Output Functions

For a minimum FSM, the next state is a function of two input bits: current state and current input. There are 16 possible 2-bit input Boolean functions. (Recall a Boolean function has a 1-bit output; a function that outputs multi-bit symbols is actually several Boolean functions, one for each output bit.) Pick a non-trivial next-state function. A trivial function is either a constant or its output is equal to its input.

In the same way, a minimum FSM's output function is a 2-bit input Boolean function. Again, pick a non-trivial output function. Having decided on your functions, interpret your FSM as computing something; that is, your FSM's output means something, depending on the interpretation of the input. For instance, input could mean a car approaching a stop light, and the output might be the light change between red and green (only one bit output, so no yellow light).

WHAT TO TURN IN

Write up a team report (very short) explaining what you did and how it worked out. Include a state-transition diagram for your FSM, some sample input, and what the resulting output should be according to your diagram. Also show actual test input you tried and the record of the output it produced. Make sure all your work is checked into your branch, but bring a paper copy of the above to your interview. Schedule a team appointment to explain your work to me.